We are seeking a talented Senior Digital Design Engineer to play a critical role in the design and verification of digital circuits for ATE ASICs. In this position, you will collaborate closely with project leads to define functional requirements and work alongside our analog design team to seamlessly integrate digital circuits into devices.
Responsibilities include defining timing constraints, performing synthesis, floor planning, place and route (PnR), and timing analysis to achieve a finalized digital layout. Additionally, you'll contribute to system verification by developing SystemVerilog or UVM testbenches and tests to validate device functionality. You may also support physical implementation to ensure an accurate and robust final design.
Please note: At this time, we are unable to offer visa sponsorship for this position. Candidates must be authorized to work in the United States without current or future sponsorship requirements.